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 IRFF9120
Data Sheet June 1999 File Number
2287.2
4A, 100V, 0.60 Ohm, P-Channel Power MOSFET
This P-Channel enhancement mode silicon gate power field effect transistor is designed for applications such as switching regulators, switching converters, motor drivers, relay drivers, and drivers for high power bipolar switching transistors requiring high speed and low gate drive power. These types can be operated directly from integrated circuits. Formerly developmental type TA17501.
Features
* 4A, 100V * rDS(ON) = 0.60 * Single Pulse Avalanche Energy Rated * SOA is Power-Dissipation Limited * Nanosecond Switching Speeds * Linear Transfer Characteristics * High Input Impedance
Ordering Information
PART NUMBER IRFF9120 NOTE: PACKAGE TO-205AF BRAND IRFF9120
Symbol
D
When ordering, use the entire part number.
G
S
Packaging
JEDEC TO-205AF
DRAIN (CASE)
SOURCE
GATE
4-94
CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures. http://www.intersil.com or 407-727-9207 | Copyright (c) Intersil Corporation 1999
IRFF9120
Absolute Maximum Ratings
TC = 25oC, Unless Otherwise Specified IRFF9120 -100 -100 -4 -16 20 20 0.16 370 -55 to 150 300 260 UNITS V V A A V W W/oC mJ oC
oC oC
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDS Drain to Gate Voltage (RGS = 20k) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR Continuous Drain Current, TC = 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS Maximum Power Dissipation, (Figure 14) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD Linear Derating Factor (Figure 14). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Single Pulse Avalanche Energy Rating (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ , TSTG Maximum Temperature for Soldering Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE: 1. TJ = 25oC to 125oC.
Electrical Specifications
PARAMETER
TC = 25oC, Unless Otherwise Specified SYMBOL BVDSS VGS(TH) IDSS TEST CONDITIONS VGS = 0V, ID = 250A VDS = VGS, ID = 250A VDS = Max Rating, VGS = 0V VDS = Max Rating x 0.8, VGS = 0V, TJ = 125oC MIN -100 -2.0 -4 1.25 VGS = 10V, ID = 4A, VDS = 0.8 Max BVDSS (See Figure 18 for Test Circuit) Gate Charge is Essentially Independent of Operating Temperature VGS = 0V, VDS = 25V, f = 1.0MHz, See Figure 10 Measured from the Drain Lead, 5.0mm (0.2in) From Header to Center of Die Measured from the Source Lead, 5.0mm (0.2in) from Header to Source Bonding Pad Modified MOSFET Symbol Showing the Internal Device Inductances
D
TYP 0.5 2 25 50 50 50 16 9 7 300 200 50 5.0
MAX -4.0 -250 -1000 -100 100 0.6 50 100 100 100 22 -
UNITS V V A A A nA nA S ns ns ns ns nC nC nC pF pF pF nH
Drain to Source Breakdown Voltage Gate Threshold Voltage Zero Gate Voltage Drain Current
On-State Drain Current (Note 2) Gate to Source Leakage Forward Gate to Source Leakage Reverse Drain to Source On-State Resistance (Note 2) Forward Transconductance (Note 2) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge (Gate to Source + Gate to Drain) Gate to Source Charge Gate to Drain "Miller" Charge Input Capacitance Output Capacitance Reverse Transfer Capacitance Internal Drain Inductance
ID(ON) IGSS IGSS rDS(ON) gfs tD(ON) tr tD(OFF) tf QG(TOT) QGS QGD CISS COSS CRSS LD
VDS > ID(ON) x rDS(ON)MAX, VGS = -10V VGS = -20V VGS = 20V VGS = 10V, ID = -2A VDS > ID(ON) x rDS(ON) Max, ID = 2A VDD 0.5BVDSS, ID = 4A, RG = 9.1 (Figure 18) MOSFET Switching Times are Essentially Independent of Operating Temperature
-
Internal Source Inductance
LS
-
15
-
nH
G
S
Junction to Case Junction to Ambient
RJC RJA Typical Socket Mount
-
-
6.25 175
oC/W oC/W
4-95
IRFF9120
Source to Drain Diode Specifications
PARAMETER Continuous Source Current Pulse Source Current (Note 3) SYMBOL ISD ISM TEST CONDITIONS Modified MOSFET Symbol Showing the Integral Reverse P-N Junction Rectifier
D
MIN -
TYP -
MAX -4 -16
UNITS A A
G
S
Source to Drain Diode Voltage (Note 2) Diode Reverse Recovery Time Reverse Recovery Charge NOTES:
VSD trr QRR
TJ = 25oC, ISD = -4A, VGS = 0V TJ = 150oC, ISD = 4A, dISD/dt = 100A/s TJ = 150oC, ISD = -4A, dISD/dt = 100A/s
-
230 1.3
-1.5 -
V ns C
2. Pulse test: Pulse width 300s, Duty Cycle 2%. 3. Repetitive rating: Pulse width limited by maximum junction temperature. See Transient Thermal Impedance Curve (Figure 3). 4. VDD = 25V, starting TJ = 250oC, L = 34.7mH, RG = 25, peak IAS = 4.0A. See Figures 15 and 16)
Typical Performance Curves
1.2 POWER DISSIPATION MULTIPLIER 1.0 ID, DRAIN CURRENT (A) -5
-4
0.8 0.6 0.4 0.2 0
-3
-2
-1
0 0 50 100 150 25 50 75 100 125 150 TC, CASE TEMPERATURE (oC) TC, CASE TEMPERATURE (oC)
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE TEMPERATURE
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs CASE TEMPERATURE
1.0 ZJC, NORMALIZED THERMAL IMPEDANCE 0.5 0.2 0.1 0.1 0.05 0.02 0.01 0.01 10-5 SINGLE PULSE 10-4 10-3 10-2 10-1 t1 t2 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZJC x RJC + TC 1 10
PDM
t1, RECTANGULAR PULSE DURATION (s)
FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE
4-96
IRFF9120 Typical Performance Curves
OPERATION IN THIS REGION IS LIMITED BY rDS(ON) 10s ID, DRAIN CURRENT (A) ID DRAIN CURRENT (A) 10 -8
(Continued)
10 -10V PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX -8V -6 VGS = -7V -4 -6V -2 -5V -4V -9V
1ms
1
10ms 100ms TC = 25oC TJ = MAX RATED SINGLE PULSE DC
0.1 1 10 VDS DRAIN VOLTAGE (V) 100
0
-10
-20
-30
-40
-50
VDS , DRAIN TO SOURCE VOLTAGE (V)
FIGURE 4. FORWARD BIAS SAFE OPERATING AREA
FIGURE 5. OUTPUT CHARACTERISTICS
5
PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX -10V
-9V
-8V
-10
ID DRAIN CURRENT (A)
4 -7V 3 V = -6V 2 -5V 1 -4V 0 0 -1 -2 -3 -4 -5 ID, DRAIN CURRENT (A)
-8
PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX VDS ID(ON) x rDS(ON) MAXIMUM
TJ = 125oC TJ = 25oC
-6
TJ = 55oC
-4
-2
0
-2
-4
-6
-8
-10
VDS, DRAIN TO SOURCE VOLTAGE (V)
VGS, GATE TO SOURCE VOLTAGE (V)
FIGURE 6. SATURATION CHARACTERISTICS
FIGURE 7. TRANSFER CHARACTERISTICS
2.0 NORMALIZED DRAIN TO SOURCE ON RESISTANCE VOLTAGE PULSE DURATION = 2s rDS(ON), DRAIN TO SOURCE 1.6 ON RESISTANCE VGS = -10V 1.2 2.2
VGS = -10V ID = -2A
1.8
1.4
0.8
1.0
0.4
VGS = -20V
0.6
0
0
-5
-10
-15
-20
-25
0.2 -40 0 40 80 120 160 TJ, JUNCTION TEMPERATURE (oC)
ID, DRAIN CURRENT (A)
FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE VOLTAGE AND DRAIN CURRENT
FIGURE 9. NORMALIZED DRAIN TO SOURCE ON RESISTANCE vs JUNCTION TEMPERATURE
4-97
IRFF9120 Typical Performance Curves
1.25 NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE
(Continued)
500 VGS = 0V, f = 1MHz CISS = CGS + CGD CRSS = CGD COSS CDS + CGD CISS 300 COSS 200
1.05
0.95
C, CAPACITANCE (pF)
1.15
400
0.85
100
CRSS
0.75 -40
0 0 40 80 120 160 TJ , JUNCTION TEMPERATURE (oC)
0
-10
-20
-30
-40
-50
VDS, DRAIN TO SOURCE VOLTAGE (V)
FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE vs JUNCTION TEMPERATURE
FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
gfs , TRANSCONDUCTANCE (S)
3
TJ = 25oC
TJ = -55oC
ISD, SOURCE TO DRAIN CURRENT (A)
PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX
-100 PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX
-10
TJ = 150oC
2 TJ = 125oC 1
TJ = 25oC -1
0 0 -2 -4 -6 ID , DRAIN CURRENT (A) -8 -10
-0.1 -0.4
-0.6
-0.8 -1.0 -1.2 -1.4 -1.6 VSD , SOURCE TO DRAIN VOLTAGE (V)
-1.8
FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT
0 VGS , GATE TO SOURCE VOLTAGE (V)
FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE
ID = -8A
-5
-10
VDS = -80V VDS = -50V VDS = -20V
-15
-20 0 4 8 12 16 20 Qg(TOT), TOTAL GATE CHARGE (nC)
FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE
4-98
IRFF9120 Test Circuits and Waveforms
VDS tAV L VARY tP TO OBTAIN REQUIRED PEAK IAS RG 0
+
VDD VDD
0V VGS
DUT tP IAS 0.01
IAS tP BVDSS VDS
FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT
FIGURE 16. UNCLAMPED ENERGY WAVEFORMS
tON td(ON) tr RL 0 10%
tOFF td(OFF) tf 10%
DUT VGS RG
VDD
+
VDS VGS 0
90%
90%
10% 50% PULSE WIDTH 90% 50%
FIGURE 17. SWITCHING TIME TEST CIRCUIT
-VDS (ISOLATED SUPPLY) 0 DUT 12V BATTERY 0.2F 50k 0.3F
FIGURE 18. RESISTIVE SWITCHING WAVEFORMS
CURRENT REGULATOR
VDS
Qgs D G 0 Ig(REF) IG CURRENT SAMPLING RESISTOR S +VDS ID CURRENT SAMPLING RESISTOR 0 DUT VDD Qgd Qg(TOT)
VGS
Ig(REF)
FIGURE 19. GATE CHARGE TEST CIRCUIT
FIGURE 20. GATE CHARGE WAVEFORMS
4-99
IRFF9120
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
Sales Office Headquarters
NORTH AMERICA Intersil Corporation P. O. Box 883, Mail Stop 53-204 Melbourne, FL 32902 TEL: (407) 724-7000 FAX: (407) 724-7240 EUROPE Intersil SA Mercure Center 100, Rue de la Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05 ASIA Intersil (Taiwan) Ltd. 7F-6, No. 101 Fu Hsing North Road Taipei, Taiwan Republic of China TEL: (886) 2 2716 9310 FAX: (886) 2 2715 3029
4-100


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